The present invention pertains to a booster circuit. In particular, the present invention pertains to a charge-pump-type booster circuit used in power supply circuits, etc.
Reference numeral 101 in FIG. 10 represents an example of a conventional booster circuit.
Said booster circuit 101 has multiple charge-pump circuits and is formed by connecting the charge-pump circuits in series. In this case, the booster circuit has 7 charge-pump circuits 1021-1027.
The input terminal of charge-pump circuit 1021 of the first stage is connected to power supply voltage Vcc, and its output terminal is connected to charge-pump circuit 1022 of the second stage.
The input terminals of the charge-pump circuits of the stages subsequent to the first stage are connected to the output terminals of the charge-pump circuits of the previous stages up to the last stage, that is, the input terminals of the charge-pump circuits 1022-1026 of the second through sixth stages are connected to the output terminals of the charge-pump circuits of the respectively previous stage.
The input terminal of charge-pump circuit 1027 of the last stage is connected to the output terminal of charge-pump circuit 1026 of the previous stage, and its output terminal is connected to output terminal 110 via a diode 180 for preventing reverse current. The boosted voltage can be output from said output terminal 110 to the load circuit (not shown in the figure). Also, an output capacitor 190 is connected between output terminal 110 and ground.
The internal configuration of each charge-pump circuit 102 is the same. Each charge-pump circuit is comprised of diode 103, gate circuit 104, and capacitor 105.
The anode terminal of each diode 103 is used as the input terminal of each charge-pump circuit 102. The anode terminal of diode 1031 of charge-pump circuit 1021 of the first stage is connected to power supply voltage Vcc. The anode terminals of diodes 1032-1037 of charge-pump circuits 1022-1027 from the second stage on are connected to the cathode terminals of diodes 1031-1036 of charge-pump circuits 1021-1026 of the previous stage. The cathode terminal in charge-pump circuit 1027 of the last stage is connected to output terminal 110 via diode 180 for preventing the flow of reverse current.
One terminal of each capacitor 105 is connected to the cathode terminal of one of diodes 1031-1037, and the other terminal of capacitor 105 is connected to the output terminal of gate circuit 104 to be described below.
Gate circuit 104 is an inverter circuit. The input terminal of the gate circuit is used as the control terminal of the charge-pump circuit where the control signal is input. When a high-level control signal is input, the terminal of capacitor 105 on the low-potential side is connected to ground GND. When a low-level control signal is input, the terminal of capacitor 105 on the low-potential side is connected to power supply voltage Vcc.
When a high-level control signal is input to gate circuit 1041 of the first stage, gate circuit 1041 of the first stage connects the terminal of capacitor 1051 on the low-potential side of charge-pump circuit 1021 of the first stage to ground GND. At that time, since the power supply voltage Vcc is applied to the anode terminal of diode 103, of charge-pump circuit 1021 of the first stage, diode 103, is forward-biased, and capacitor 105, is charged to the power supply voltage Vcc.
Next, when a low-level control signal is input to gate circuit 1041 of charge-pump circuit 1021 in the first stage, the terminal of capacitor 105, on the low-potential side is connected to power supply voltage Vcc, and the voltage at the terminal of capacitor 105 on the high-potential side is boosted by as much as the power supply voltage Vcc from the charged voltage (Vcc) on capacitor 1051 to becomes 2Vcc. Since the potential at the anode terminal of diode 1031 in charge-pump circuit 1021 of the first stage is the power supply voltage Vcc, which is less than the potential at the cathode terminal, diode 1031 is reverse-biased.
In that state, gate circuit 1042 of charge-pump circuit 1022 of the second stage connects the terminal of capacitor 1052 on the low-potential side to ground GND. Since 2Vcc is applied to the anode terminal of diode 1032 of charge-pump circuit 1022 of the second stage, diode 1032 is forward-biased, and capacitor 1052 of charge-pump circuit 1022 of the second stage is charged by the boosted voltage 2Vcc.
Next, when gate circuit 1042 of charge-pump circuit 1022 of the second stage connects the terminal of capacitor 1052 on the low-potential side to power supply voltage Vcc, the voltage at the terminal of capacitor 1052 on the high-potential side is boosted by as much as the power supply voltage Vcc from the charged voltage (2Vcc) on capacitor 1052 to become 3Vcc. Since the output voltage 2Vcc of charge-pump circuit 1021 of the first stage is applied to the anode terminal of diode 1032 of the second stage, diode 1032 of the second stage is reverse-biased by the boosted voltage 3Vcc.
At that time, when a high level control signal is input to gate circuit 1043 of charge-pump circuit 1023 of the third stage, gate circuit 1043 of charge-pump circuit 1023 of the third stage connects the terminal of capacitor 1053 on the low-potential side of the third stage to ground GND, and said capacitor 1053 is charged by the boosted voltage 3Vcc on charge-pump circuit 1022 of the second stage.
In said booster circuit 101, the voltage input to each of charge-pump circuits 1021-1026 is boosted by as much as the power supply voltage Vcc as described above. As a result, a voltage equal to (number of charge-pump circuit stages+1)xc3x97Vcc, that is, 8Vcc is output from charge-pump circuit 1027 of the last stage to a load circuit (not shown in the figure) via diode 180 which is used to prevent the flow of reverse current, at output terminal 110.
In the steady state, each capacitor 105 of said charge-pump circuit 102 is initially charged to a voltage corresponding to the number of stages of charge-pump circuits 102. On the other hand, since the voltage across the two terminals of each capacitor 105 is 0 V before the booster circuit is started, the amount of the electric charge on each capacitor 105 at steady state is greater than that when the booster circuit is started.
Conventionally, the time needed for each capacitor to be charged to a prescribed level when the booster circuit is started can be shortened by increasing the drivability of gate circuit 105 in advance. In this case, since each gate circuit 105 has a drivability higher than the essential level in the steady state, power consumption and noise also become higher than the essential level in the steady state.
In said booster circuit 101, when a high-level control signal is input to gate circuit 104n of charge-pump circuit 102n of a given stage to boost the voltage by as much as the power supply voltage Vcc, low level signals must be input to gate circuits 104nxe2x88x921 and 104n+1 of the charge-pump circuits of the previous and subsequent stages. Therefore, it is preferred to input control signals of opposite phase to the gate circuits of neighboring stages.
Consequently, said conventional booster circuit 101 has a signal-generating circuit 108 used for generating control signals. The same first control signal is input to gate circuits 1041, 1043, 1045, and 1047 of the charge-pump circuits of the odd-numbered stages, while a second control signal of different phase than the first control signal is input to gate circuits 1042, 1044, and 1046 of the charge-pump circuits of the even-numbered charge-pump circuits. In this case, the first and second control signals have opposite phase.
In this case, since the same first control signal is input to gate circuits 1041, 1043, 1045, and 1047 in the charge-pump circuits of the odd-numbered stages, when the logic level of the first control signal is switched, the logic level of the output signals of gate circuits 1041, 1043, 1045, and 1047 are switched at the same time.
On the other hand, since the same second control signal is input to gate circuits 1042, 1044, and 1046 of the charge-pump circuits of the even-numbered stages, when the logic level of the second control signal is switched, the logic levels of the output signals of said gate circuits 1042, 1044, and 1046 are switched at the same time.
When the logic level of the output signal of each gate circuit 104 is switched, charging/discharging of capacitor 105 is switched, and current flows to each gate circuit 104. FIG. 11 shows the relationship between the output signal of the gate circuits and the sum Ica of the currents flowing to all of gate circuits 1041-1047.
When the logic level of the output signal is switched, the current flowing to each gate circuit 104 is very small. In the conventional booster circuit, however, since the logic levels of the output signals of gate circuits 1041, 1043, 1045, and 1047 of the odd-numbered stages as well as gate circuits 1042, 1044, and 1046 of the even-numbered stages are switched at the same time and capacitors connected to the various gate circuits are charged/discharged at the same time, the currents are concentrated to result in a large current when the logic level is switched. As a result, the switching noise level becomes high.
The purpose of the present invention is to solve the aforementioned problem of the conventional technology by providing a booster circuit which can reduce the power consumption and the switching noise level.
In order to realize the aforementioned purpose, claim 1 of the present invention provides a booster circuit characterized by the following facts: the booster circuit has N rectifying elements which are electrically connected in series between a voltage input terminal and a voltage output terminal with the terminal on the anode side taken as the aforementioned voltage input terminal side; N capacitors, each of which has one of the terminals electrically connected to the terminal on the cathode side of one of the aforementioned rectifying elements; N drive circuits, each of which has its output terminal electrically connected to the other terminal of the aforementioned capacitor and is able to drive the other terminal of the aforementioned capacitor to a first voltage or a second voltage as a function of a control signal; a signal supply circuit which supplies a first control signal to the aforementioned drive circuits of the odd-numbered stages and supplies a second control signal whose phase is opposite to that of the first control signal to the drive circuits of the even-numbered stages; and an output circuit which monitors the output voltage at the aforementioned voltage output terminal and outputs a disable signal to each of the aforementioned drive circuits when the aforementioned output voltage is above a prescribed level; wherein each of the aforementioned drive circuits has first and second drive units which can drive the other terminal of the aforementioned capacitor to the first or second voltage; and wherein the aforementioned second drive unit is able to suspend driving of the other terminal of the aforementioned capacitor as a function of the aforementioned disable signal.
According to claim 2 of the present invention, the booster circuit described in claim 1 has a diode for preventing reverse current that is electrically connected between the terminal on the cathode side of the rectifying element of the Nth stage and the aforementioned voltage output terminal, and an output capacitor which is connected between the aforementioned voltage output terminal and reference potential where the aforementioned rectifying elements are diodes.
Claim 3 of the present invention provides a booster circuit characterized by the following facts: the booster circuit has N rectifying elements that are electrically connected in series between a voltage input terminal and a voltage output terminal with the terminal on the anode side taken as the aforementioned voltage input terminal side; N capacitors, each of which has one of the terminals electrically connected to the terminal on the cathode side of one of the aforementioned rectifying elements; and a signal supply circuit which supplies a first control signal to the aforementioned capacitors of the odd-numbered stages and supplies a second control signal whose phase is opposite to that of the first control signal to the capacitors of the even-numbered stages; a first time delay is applied sequentially to the first control signal supplied to the other terminal of each capacitor of the odd-numbered stages, and a second time delay is applied sequentially to the second control signal supplied to the other terminal of each capacitor of the even-numbered stages.
According to claim 4 of the present invention, the booster circuit described in claim 3 has a diode for preventing reverse current, which is electrically connected between the terminal on the cathode side of the rectifying element of the Nth stage and the aforementioned voltage output terminal, and an output capacitor which is connected between the aforementioned voltage output terminal and reference potential where the aforementioned rectifying elements are diodes, and the aforementioned signal supply circuit is composed of a ring oscillator.
The booster circuit of the present invention has a first drive unit (charging/discharging circuit) and a second drive unit (auxiliary charging/discharging circuit). The charging/discharging circuit can operate independently or together with the auxiliary charging/discharging circuit.
When the booster circuit is started, both the charging/discharging circuit and the auxiliary charging/discharging circuit are operated together to increase the drivability of the drive circuits (gate circuits) to shorten the capacitor charging time. On the other hand, when the charging/discharging circuit is operated independently in the steady state, which does not require a high drivability, the drivability becomes lower than that at the time when the booster circuit is started. Consequently, the power consumption and noise can be reduced compared with the conventional booster circuit which uses gate circuits with high drivability.
The output voltage (boosted voltage) is at a high level in the steady state but at a low level when the booster circuit is started. Therefore, it is possible to detect whether the booster circuit is in steady state or has just been started by detecting the output of the booster circuit.
Consequently, when the booster circuit is started with the output of the booster circuit at a low level, the charging/discharging circuit is operated together with the auxiliary charging/discharging circuit. When the booster circuit is steady state with the output at a high level, the charging/discharging circuit is operated independently. In this way, the drivability can be increased only when the booster circuit is started.
In another booster circuit of the present invention, the first and second control signals generated in the signal supply circuit (timing control circuit) are applied to the charge-pump circuits comprised of rectifying elements and capacitors in each stage after the control signals are delayed by different periods of time for each charge-pump circuit, respectively. Since each charge-pump circuit is synchronized with the input control signal to perform switching between charging and discharging of a capacitor, the charging/discharging states of the capacitors arranged in the various charge-pump circuits are switched at completely different times, and it is possible to avoid the situation that the charging/discharging states of two or more capacitors are switched at the same time.
In another booster circuit of the present invention, the timing control circuit is made of a ring oscillator comprised of multiple inverters. The output signals of the inverters are input to the charge-pump circuits.
In particular, when the number of inverter stages is equal to the number of charge-pump stages and the output signal of each inverter is input to a charge-pump circuit, in a ring oscillator comprised of N inverters and having a period of T, the signal input to each inverter is delayed by (T/(2xc3x97N)). Consequently, the output signals of the inverters are always switched one at a time.
Since each charge-pump circuit switches the charging/discharging state of the capacitor of each charge-pump circuit as a result of switching of the output signal of the inverter, the charging/discharging states of the capacitors can always be switched one at a time.